1. Field
Example embodiments of the present invention relate to a method of forming a dielectric thin film and a method of fabricating a semiconductor memory device having the same. Other example embodiments of the present invention relate to a method of forming a ZrO2 thin film and a method of fabricating a capacitor of a semiconductor memory device using the ZrO2 thin film as a dielectric layer.
2. Description of the Related Art
Highly integrated semiconductor memory devices may have a reduced design rule and an area may also be reduced that is occupied by a unit memory cell of the semiconductor memory device. An area may be reduced that is occupied by a capacitor used in a memory cell of a dynamic random access memory (DRAM) device, but the capacitor may still be required to have enough capacitance to provide data input/output characteristics and/or reproducing characteristics, which are typically allowable. Reduction of process margins and spaces may have influenced the design of the capacitor of the memory cell. In order to fabricate a capacitor having a reduced capacitance in a reduced space, various capacitor lower electrode structures, having a relatively high height in a three-dimensional structure, have been proposed.
Various technologies have been developed in order to increase a capacitance in a unit area of a capacitor. In the conventional art, a metal-insulator-semiconductor (MIS) capacitor structure, using a SiO2 dielectric layer, may be used to ensure reduced capacitance by reducing the thickness of the dielectric layer or increasing an effective area in a three-dimensional structure. Because the MIS structure using a SiO2 dielectric layer has reached procedural limitations with increased integration of the device, new technology may need to be developed. An MIM capacitor that uses a metal (e.g., TiN and/or Pt) as an electrode may need a higher work function in order to overcome the limitations of the MIS capacitor. The MIM capacitor may use metal oxide as a dielectric layer, which may be achieved from the metal having a higher oxygen affinity. A conventional metal oxide, used as the dielectric layer, of the MIM capacitor may be HfO2. HfO2, as a high-k material, has a relatively high permittivity of about 20-25 and a relatively wide band gap. HfO2 may ensure higher reliability and higher process stability as compared to other high-k dielectric layers. HfO2 may also be a dielectric layer material for a next-generation DRAM capacitor.
HfO2 may be crystallized at a temperature of about 450° C., which may cause deterioration of leakage current characteristics. A composite layer composed of a HfO2/Al2O3/HfO2 (HAH) stack structure, or a HfxAlyOz composite layer formed by alternately and repeatedly stacking a HfO2 layer and an Al2O3 layer, has been studied as an alternative solution to the local defect caused by crystallization of HfO2. These layers may have about 12 Å of an equivalent oxide thickness (EOT) satisfying the condition of about 1 fA/cell based on about 1 V of leakage current. These layers may not be employed for a next generation memory device (e.g., 60 nm of dynamic random access memory (DRAM) or merging DRAM with logic (MDL)), which may require an EOT less than about 10 Å.